library verilog;
use verilog.vl_types.all;
entity pmi_dsp_multaddsub is
    generic(
        pmi_dataa_width : integer := 8;
        pmi_datab_width : integer := 8;
        pmi_additional_pipeline: integer := 0;
        pmi_input_reg   : string  := "on";
        pmi_output_reg  : string  := "on";
        pmi_family      : string  := "ECP2";
        pmi_gsr         : string  := "enable";
        pmi_source_control_a0: string  := "parallel";
        pmi_source_control_a1: string  := "parallel";
        pmi_source_control_b0: string  := "parallel";
        pmi_source_control_b1: string  := "parallel";
        pmi_reg_inputa0_clk: string  := "CLK0";
        pmi_reg_inputa0_ce: string  := "CE0";
        pmi_reg_inputa0_rst: string  := "RST0";
        pmi_reg_inputa1_clk: string  := "CLK0";
        pmi_reg_inputa1_ce: string  := "CE0";
        pmi_reg_inputa1_rst: string  := "RST0";
        pmi_reg_inputb0_clk: string  := "CLK0";
        pmi_reg_inputb0_ce: string  := "CE0";
        pmi_reg_inputb0_rst: string  := "RST0";
        pmi_reg_inputb1_clk: string  := "CLK0";
        pmi_reg_inputb1_ce: string  := "CE0";
        pmi_reg_inputb1_rst: string  := "RST0";
        pmi_reg_pipeline0_clk: string  := "CLK0";
        pmi_reg_pipeline0_ce: string  := "CE0";
        pmi_reg_pipeline0_rst: string  := "RST0";
        pmi_reg_pipeline1_clk: string  := "CLK0";
        pmi_reg_pipeline1_ce: string  := "CE0";
        pmi_reg_pipeline1_rst: string  := "RST0";
        pmi_reg_output_clk: string  := "CLK0";
        pmi_reg_output_ce: string  := "CE0";
        pmi_reg_output_rst: string  := "RST0";
        pmi_reg_signeda_0_clk: string  := "CLK0";
        pmi_reg_signeda_0_ce: string  := "CE0";
        pmi_reg_signeda_0_rst: string  := "RST0";
        pmi_reg_signeda_1_clk: string  := "CLK0";
        pmi_reg_signeda_1_ce: string  := "CE0";
        pmi_reg_signeda_1_rst: string  := "RST0";
        pmi_reg_signedb_0_clk: string  := "CLK0";
        pmi_reg_signedb_0_ce: string  := "CE0";
        pmi_reg_signedb_0_rst: string  := "RST0";
        pmi_reg_signedb_1_clk: string  := "CLK0";
        pmi_reg_signedb_1_ce: string  := "CE0";
        pmi_reg_signedb_1_rst: string  := "RST0";
        pmi_reg_addnsub_0_clk: string  := "CLK0";
        pmi_reg_addnsub_0_ce: string  := "CE0";
        pmi_reg_addnsub_0_rst: string  := "RST0";
        pmi_reg_addnsub_1_clk: string  := "CLK0";
        pmi_reg_addnsub_1_ce: string  := "CE0";
        pmi_reg_addnsub_1_rst: string  := "RST0";
        pmi_pipelined_mode: string  := "off";
        module_type     : string  := "pmi_dsp_multaddsub"
    );
    port(
        A0              : in     vl_logic_vector;
        A1              : in     vl_logic_vector;
        B0              : in     vl_logic_vector;
        B1              : in     vl_logic_vector;
        SRIA            : in     vl_logic_vector(17 downto 0);
        SRIB            : in     vl_logic_vector(17 downto 0);
        CLK0            : in     vl_logic;
        CLK1            : in     vl_logic;
        CLK2            : in     vl_logic;
        CLK3            : in     vl_logic;
        CE0             : in     vl_logic;
        CE1             : in     vl_logic;
        CE2             : in     vl_logic;
        CE3             : in     vl_logic;
        RST0            : in     vl_logic;
        RST1            : in     vl_logic;
        RST2            : in     vl_logic;
        RST3            : in     vl_logic;
        SignA           : in     vl_logic;
        SignB           : in     vl_logic;
        ShiftA0         : in     vl_logic;
        ShiftA1         : in     vl_logic;
        ShiftB0         : in     vl_logic;
        ShiftB1         : in     vl_logic;
        ADDNSUB         : in     vl_logic;
        SUM             : out    vl_logic_vector;
        SROA            : out    vl_logic_vector(17 downto 0);
        SROB            : out    vl_logic_vector(17 downto 0)
    );
    attribute mti_svvh_generic_type : integer;
    attribute mti_svvh_generic_type of pmi_dataa_width : constant is 1;
    attribute mti_svvh_generic_type of pmi_datab_width : constant is 1;
    attribute mti_svvh_generic_type of pmi_additional_pipeline : constant is 1;
    attribute mti_svvh_generic_type of pmi_input_reg : constant is 1;
    attribute mti_svvh_generic_type of pmi_output_reg : constant is 1;
    attribute mti_svvh_generic_type of pmi_family : constant is 1;
    attribute mti_svvh_generic_type of pmi_gsr : constant is 1;
    attribute mti_svvh_generic_type of pmi_source_control_a0 : constant is 1;
    attribute mti_svvh_generic_type of pmi_source_control_a1 : constant is 1;
    attribute mti_svvh_generic_type of pmi_source_control_b0 : constant is 1;
    attribute mti_svvh_generic_type of pmi_source_control_b1 : constant is 1;
    attribute mti_svvh_generic_type of pmi_reg_inputa0_clk : constant is 1;
    attribute mti_svvh_generic_type of pmi_reg_inputa0_ce : constant is 1;
    attribute mti_svvh_generic_type of pmi_reg_inputa0_rst : constant is 1;
    attribute mti_svvh_generic_type of pmi_reg_inputa1_clk : constant is 1;
    attribute mti_svvh_generic_type of pmi_reg_inputa1_ce : constant is 1;
    attribute mti_svvh_generic_type of pmi_reg_inputa1_rst : constant is 1;
    attribute mti_svvh_generic_type of pmi_reg_inputb0_clk : constant is 1;
    attribute mti_svvh_generic_type of pmi_reg_inputb0_ce : constant is 1;
    attribute mti_svvh_generic_type of pmi_reg_inputb0_rst : constant is 1;
    attribute mti_svvh_generic_type of pmi_reg_inputb1_clk : constant is 1;
    attribute mti_svvh_generic_type of pmi_reg_inputb1_ce : constant is 1;
    attribute mti_svvh_generic_type of pmi_reg_inputb1_rst : constant is 1;
    attribute mti_svvh_generic_type of pmi_reg_pipeline0_clk : constant is 1;
    attribute mti_svvh_generic_type of pmi_reg_pipeline0_ce : constant is 1;
    attribute mti_svvh_generic_type of pmi_reg_pipeline0_rst : constant is 1;
    attribute mti_svvh_generic_type of pmi_reg_pipeline1_clk : constant is 1;
    attribute mti_svvh_generic_type of pmi_reg_pipeline1_ce : constant is 1;
    attribute mti_svvh_generic_type of pmi_reg_pipeline1_rst : constant is 1;
    attribute mti_svvh_generic_type of pmi_reg_output_clk : constant is 1;
    attribute mti_svvh_generic_type of pmi_reg_output_ce : constant is 1;
    attribute mti_svvh_generic_type of pmi_reg_output_rst : constant is 1;
    attribute mti_svvh_generic_type of pmi_reg_signeda_0_clk : constant is 1;
    attribute mti_svvh_generic_type of pmi_reg_signeda_0_ce : constant is 1;
    attribute mti_svvh_generic_type of pmi_reg_signeda_0_rst : constant is 1;
    attribute mti_svvh_generic_type of pmi_reg_signeda_1_clk : constant is 1;
    attribute mti_svvh_generic_type of pmi_reg_signeda_1_ce : constant is 1;
    attribute mti_svvh_generic_type of pmi_reg_signeda_1_rst : constant is 1;
    attribute mti_svvh_generic_type of pmi_reg_signedb_0_clk : constant is 1;
    attribute mti_svvh_generic_type of pmi_reg_signedb_0_ce : constant is 1;
    attribute mti_svvh_generic_type of pmi_reg_signedb_0_rst : constant is 1;
    attribute mti_svvh_generic_type of pmi_reg_signedb_1_clk : constant is 1;
    attribute mti_svvh_generic_type of pmi_reg_signedb_1_ce : constant is 1;
    attribute mti_svvh_generic_type of pmi_reg_signedb_1_rst : constant is 1;
    attribute mti_svvh_generic_type of pmi_reg_addnsub_0_clk : constant is 1;
    attribute mti_svvh_generic_type of pmi_reg_addnsub_0_ce : constant is 1;
    attribute mti_svvh_generic_type of pmi_reg_addnsub_0_rst : constant is 1;
    attribute mti_svvh_generic_type of pmi_reg_addnsub_1_clk : constant is 1;
    attribute mti_svvh_generic_type of pmi_reg_addnsub_1_ce : constant is 1;
    attribute mti_svvh_generic_type of pmi_reg_addnsub_1_rst : constant is 1;
    attribute mti_svvh_generic_type of pmi_pipelined_mode : constant is 1;
    attribute mti_svvh_generic_type of module_type : constant is 1;
end pmi_dsp_multaddsub;
